![]() ![]() ![]() Perhaps, group clusters into regions and have a bit per region or use a sparse directory. Future work needs to reduce this space for the system to become scalable.Directory: bit-vector with one bit per remote cluster.States: uncached remote, shared remote, dirty remote.This paper is primarily about the inter-cluster protocol. DASH Cache Coherence protocol: invalidation-based, ownership-based protocol between clusters, which connects to a snooping-based, MESI protocol within clusters.DASH provides a full fence (all accesses have to be completed) and a write fence (all writes have to be completed).Release consistency (not novel): accesses can be delayed until a release (aka fence).Performance metrics: latency, bandwidth (throughput).Correctness: should guarantee a specified memory consistency model, deadlock free, detect processor failures.This system chooses directory, because it scales better.Cache coherence: Either snoopy or directory-based.System := M clusters (shared memory through directory-based cache coherence) connected with a high-bandwidth low-latency interconnect.cluster := N processing nodes (shared memory through snooping-based cache coherence), memory, directory, and remote access cache.processing node := processors and private cache.Stronger have fewer permissible values for loads.Memory Consistency model: What values can a store return (when there have been multiple stores on different processors)?.How do we implement scalable shared memory?.in dynamic load distribution) but has problems scaling up. Shared memory: User to program (no need for explicit data partitioning esp.They either use shared memory/cache coherence or message passing to communicate.Uniprocessors have inherent limitations in the size of problems a single one can process, but they are easy to replicate.The larger Stanford DASH project would be hugely influential in academia and industry, proving the viability of a cache-coherent NUMA machine and release consistency. DASH uses a directory-based coherence protocol with point-to-point messages.ĭirectory-based cache coherence is essential to modern high-performance computers (supercomputers), although we have evolved to more complex directory structures. Data has to be communicated between them. However, these have multiple separate memories. Uniprocessors can only handle small problem sizes, so the future lies in multi-processor systems. Internet Archive Scholar (search for fulltext): The directory-based cache coherence protocol for the DASH multiprocessor ![]() ACM SIGARCH Computer Architecture News ( RSS)ĭOI (original publisher): 10.1145/325096.325132 Hennessy (1990/05) The directory-based cache coherence protocol for the DASH multiprocessor. Citation: Daniel Lenoski, James Pierce Laudon, Kourosh Gharachorloo, Anoop Gupta, John L. ![]()
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